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RAP opportunity at Air Force Science and Technology Fellowship Program     AF STFP

Electronic-grade dielectric integration for high-power, high frequency electronic devices


Sensors Directorate, RY/Sensors Division

opportunity location
13.35.01.C0534 Wright-Patterson AFB, OH 454337542


name email phone
Ahmad Ehteshamul Islam 937-713-8906


Successful integration of dielectrics into a transistor process flow with negligible defect density has historically been the key for wide scale application of electronic devices. Dielectrics are needed not only as gate insulators for operation of metal oxide semiconductor field-effect transistors (MOSFETs), they are also needed for passivation of metal semiconductor FET (MESFET) and high-electron mobility transistors (HEMT; which is a different form of MESFET). The presence of defects either in the bulk or in the interface of these dielectrics critically affects the performance of transistors. Transistors for RF operation use all the above transistor configurations. The semiconducting channel in these transistors are generally made with III-V (like GaAs, GaN, AlGaN) or III-O (like Ga2O3, AlGaO) materials. These materials do not have a native dielectric as Si has in the form of SiO2; and therefore, have an unoptimized dielectric/semiconductor interface even 40 years after their introduction into RF electronics. In addition, formation of novel dielectrics on these materials poses additional challenges in terms of bulk and interface defects, and carrier injection into dielectric, which leads to instability in device operation. Significant research opportunities therefore exist in integrating classical and novel dielectrics in III-V and III-O based semiconductors. These are especially important for high power RF applications that require use of wide bandgap (WBG) materials like III-N and III-O and require high voltage application across the dielectric.

This research targets successful integration of dielectrics in high-power GaN-based RF transistors. This will require optimization of a wide range of process parameters during device fabrication in AFRL/RY’s class 100 (ISO-5) cleanroom. Resultant devices will go through extensive electrical (CV, I-V, transient, noise), optical (different forms of spectroscopy and microscopy) and materials characterization for confirming the effect of different process parameters on device performance. AFRL has excellent characterization capability that will be useful for such characterization. The goal of this project is to generate critical and novel knowledge that will enable application of WBG materials that will satisfy unique requirements of the United States Air Force and Space Force.

[1] Islam et al., "Defect engineering at the Al2O3/(010) βGa2O3 interface via surface treatments and forming gas post-deposition anneals", IEEE Transactions on Electron Devices, vol. 69, no. 10, pp. 5656-5663, Oct. 2022.

[2] Islam et al., "500 oC operation of β-Ga2O3 field-effect transistors", Applied Physics Letters, 121, 243501 (2022)

[3] Green et al., “β-Gallium oxide power electronics”, APL Materials, 10, 029201, 2022

key words
Dielectrics; Integration; III-V materials; beta-Ga2O3; interface/oxide defects; High power electronics; RF electronics


Citizenship:  Open to U.S. citizens
Level:  Open to Postdoctoral and Senior applicants


Base Stipend Travel Allotment Supplementation
$95,000.00 $5,000.00

Experience Supplement:
Postdoctoral and Senior Associates will receive an appropriately higher stipend based on the number of years of experience past their PhD.

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